New Switches with Broadcom StrataDNX
Does anyone know when the switching and router vendors will release their new models with the Broadcom BCM88370 and BCM88670 chips? It looks like these chips could be used as a carrier grade router and/or metro E device. More information here: http://www.broadcom.com/press/release.php?id=s902223 and here: http://www.nextplatform.com/2015/03/19/new-dune-chips-enable-heftier-switche...
On 18/Jan/16 01:15, Colton Conor wrote:
Does anyone know when the switching and router vendors will release their new models with the Broadcom BCM88370 and BCM88670 chips? It looks like these chips could be used as a carrier grade router and/or metro E device.
More information here: http://www.broadcom.com/press/release.php?id=s902223
and here: http://www.nextplatform.com/2015/03/19/new-dune-chips-enable-heftier-switche...
I should dig around for more information around these. Merchant chips have focused on bandwidth scaling at the expense of key features available in custom silicon. This has forced me to avoid certain hardware from even the big vendors. Bandwidth is not everything... if the approach with this new chip is different, I'd be interested. Time to hunt... Mark.
The BCM88670 (Jericho) is what powers the new Cisco NCS55XX devices. The processor is linerate above around 100 bytes per packet without external TCAM, supports 256K IPv4/64K IPv6 FIB entries (or mixed amounts). These chips are being used for high scale 100G, the initial NCS5508 linecard is a 36x100G QSFP28 one. Juniper has chosen to use their own silicon for most of their dense 100G platforms, but you’ll see these chips used by pretty much everyone else I imagine at some point in the next year. Phil -----Original Message----- From: NANOG <nanog-bounces@nanog.org> on behalf of Colton Conor <colton.conor@gmail.com> Date: Sunday, January 17, 2016 at 18:15 To: NANOG <nanog@nanog.org> Subject: New Switches with Broadcom StrataDNX
Does anyone know when the switching and router vendors will release their new models with the Broadcom BCM88370 and BCM88670 chips? It looks like these chips could be used as a carrier grade router and/or metro E device.
More information here: http://www.broadcom.com/press/release.php?id=s902223
and here: http://www.nextplatform.com/2015/03/19/new-dune-chips-enable-heftier-switche...
hey,
Juniper has chosen to use their own silicon for most of their dense 100G platforms, but you’ll see these chips used by pretty much everyone else I imagine at some point in the next year.
Juniper silicon has one big advantage over BCM88670 - it supports 2M FIB entries. This makes PTX1000 (and QFX10002) very attractive platform for SPs. -- tarko
On 19/Jan/16 13:54, Tarko Tikan wrote:
Juniper silicon has one big advantage over BCM88670 - it supports 2M FIB entries. This makes PTX1000 (and QFX10002) very attractive platform for SPs.
Vendor-owned silicon will always provide better all-round performance. It's just pricier. Mark.
I was hoping this new Broadcom chip would be able to support enough routes to hold a full BGP table, and be used for something like cumulus linux. I have no need for 100G, but 10G and 40G on a platform with deeper buffers sounds nice. On Tue, Jan 19, 2016 at 1:01 AM, Phil Bedard <bedard.phil@gmail.com> wrote:
The BCM88670 (Jericho) is what powers the new Cisco NCS55XX devices. The processor is linerate above around 100 bytes per packet without external TCAM, supports 256K IPv4/64K IPv6 FIB entries (or mixed amounts). These chips are being used for high scale 100G, the initial NCS5508 linecard is a 36x100G QSFP28 one.
Juniper has chosen to use their own silicon for most of their dense 100G platforms, but you’ll see these chips used by pretty much everyone else I imagine at some point in the next year.
Phil
-----Original Message----- From: NANOG <nanog-bounces@nanog.org> on behalf of Colton Conor < colton.conor@gmail.com> Date: Sunday, January 17, 2016 at 18:15 To: NANOG <nanog@nanog.org> Subject: New Switches with Broadcom StrataDNX
Does anyone know when the switching and router vendors will release their new models with the Broadcom BCM88370 and BCM88670 chips? It looks like these chips could be used as a carrier grade router and/or metro E device.
More information here: http://www.broadcom.com/press/release.php?id=s902223
and here:
http://www.nextplatform.com/2015/03/19/new-dune-chips-enable-heftier-switche...
It does support a path to use an external TCAM if vendors do that, and will support 1M+ entries. It will be more expensive and the datapath will be slower which will impact the performance a bit. I think you’ll see this make its way into something like a 48x10G/4x100G (or 40G) type platform but we’ll see. Phil From: Colton Conor <colton.conor@gmail.com> Date: Tuesday, January 19, 2016 at 09:29 To: Phil B <bedard.phil@gmail.com> Cc: NANOG <nanog@nanog.org> Subject: Re: New Switches with Broadcom StrataDNX I was hoping this new Broadcom chip would be able to support enough routes to hold a full BGP table, and be used for something like cumulus linux. I have no need for 100G, but 10G and 40G on a platform with deeper buffers sounds nice. On Tue, Jan 19, 2016 at 1:01 AM, Phil Bedard <bedard.phil@gmail.com> wrote: The BCM88670 (Jericho) is what powers the new Cisco NCS55XX devices. The processor is linerate above around 100 bytes per packet without external TCAM, supports 256K IPv4/64K IPv6 FIB entries (or mixed amounts). These chips are being used for high scale 100G, the initial NCS5508 linecard is a 36x100G QSFP28 one. Juniper has chosen to use their own silicon for most of their dense 100G platforms, but you’ll see these chips used by pretty much everyone else I imagine at some point in the next year. Phil -----Original Message----- From: NANOG <nanog-bounces@nanog.org> on behalf of Colton Conor <colton.conor@gmail.com> Date: Sunday, January 17, 2016 at 18:15 To: NANOG <nanog@nanog.org> Subject: New Switches with Broadcom StrataDNX
Does anyone know when the switching and router vendors will release their new models with the Broadcom BCM88370 and BCM88670 chips? It looks like these chips could be used as a carrier grade router and/or metro E device.
More information here: http://www.broadcom.com/press/release.php?id=s902223
and here: http://www.nextplatform.com/2015/03/19/new-dune-chips-enable-heftier-switche...
Hi, Some points: 1.DNX SDK is significantly different from SGX, adopted by Cumulus and such, yet to be done, and this is not negligible amount of work 2.if you are not interested in capacity but in scale, there’re other BCM chips, perhaps more suitable 3.you don’t have to have all the forwarding entries populated in silicon, as an example - take a look at http://sdn-internet-router-sir.readthedocs.org, code at https://github.com/dbarrosop/sir, one could also leverage approach we have taken in EVPN - decoupling RIB from FIB completely 4.NG silicon will do 1M+ LPM's Cheers, Jeff On 1/19/16, 06:29, "NANOG on behalf of Colton Conor" <nanog-bounces@nanog.org on behalf of colton.conor@gmail.com> wrote:
I was hoping this new Broadcom chip would be able to support enough routes to hold a full BGP table, and be used for something like cumulus linux. I have no need for 100G, but 10G and 40G on a platform with deeper buffers sounds nice.
On Tue, Jan 19, 2016 at 1:01 AM, Phil Bedard <bedard.phil@gmail.com> wrote:
The BCM88670 (Jericho) is what powers the new Cisco NCS55XX devices. The processor is linerate above around 100 bytes per packet without external TCAM, supports 256K IPv4/64K IPv6 FIB entries (or mixed amounts). These chips are being used for high scale 100G, the initial NCS5508 linecard is a 36x100G QSFP28 one.
Juniper has chosen to use their own silicon for most of their dense 100G platforms, but you’ll see these chips used by pretty much everyone else I imagine at some point in the next year.
Phil
-----Original Message----- From: NANOG <nanog-bounces@nanog.org> on behalf of Colton Conor < colton.conor@gmail.com> Date: Sunday, January 17, 2016 at 18:15 To: NANOG <nanog@nanog.org> Subject: New Switches with Broadcom StrataDNX
Does anyone know when the switching and router vendors will release their new models with the Broadcom BCM88370 and BCM88670 chips? It looks like these chips could be used as a carrier grade router and/or metro E device.
More information here: http://www.broadcom.com/press/release.php?id=s902223
and here:
http://www.nextplatform.com/2015/03/19/new-dune-chips-enable-heftier-switche...
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router. Phil -----Original Message----- From: Jeff Tantsura <jeff.tantsura@ericsson.com> Date: Tuesday, January 19, 2016 at 11:46 To: Colton Conor <colton.conor@gmail.com>, Phil B <bedard.phil@gmail.com> Cc: NANOG <nanog@nanog.org> Subject: Re: New Switches with Broadcom StrataDNX
Hi,
Some points: 1.DNX SDK is significantly different from SGX, adopted by Cumulus and such, yet to be done, and this is not negligible amount of work 2.if you are not interested in capacity but in scale, there’re other BCM chips, perhaps more suitable 3.you don’t have to have all the forwarding entries populated in silicon, as an example - take a look at http://sdn-internet-router-sir.readthedocs.org, code at https://github.com/dbarrosop/sir, one could also leverage approach we have taken in EVPN - decoupling RIB from FIB completely 4.NG silicon will do 1M+ LPM's
Cheers, Jeff
On 1/19/16, 06:29, "NANOG on behalf of Colton Conor" <nanog-bounces@nanog.org on behalf of colton.conor@gmail.com> wrote:
I was hoping this new Broadcom chip would be able to support enough routes to hold a full BGP table, and be used for something like cumulus linux. I have no need for 100G, but 10G and 40G on a platform with deeper buffers sounds nice.
On Tue, Jan 19, 2016 at 1:01 AM, Phil Bedard <bedard.phil@gmail.com> wrote:
The BCM88670 (Jericho) is what powers the new Cisco NCS55XX devices. The processor is linerate above around 100 bytes per packet without external TCAM, supports 256K IPv4/64K IPv6 FIB entries (or mixed amounts). These chips are being used for high scale 100G, the initial NCS5508 linecard is a 36x100G QSFP28 one.
Juniper has chosen to use their own silicon for most of their dense 100G platforms, but you’ll see these chips used by pretty much everyone else I imagine at some point in the next year.
Phil
-----Original Message----- From: NANOG <nanog-bounces@nanog.org> on behalf of Colton Conor < colton.conor@gmail.com> Date: Sunday, January 17, 2016 at 18:15 To: NANOG <nanog@nanog.org> Subject: New Switches with Broadcom StrataDNX
Does anyone know when the switching and router vendors will release their new models with the Broadcom BCM88370 and BCM88670 chips? It looks like these chips could be used as a carrier grade router and/or metro E device.
More information here: http://www.broadcom.com/press/release.php?id=s902223
and here:
http://www.nextplatform.com/2015/03/19/new-dune-chips-enable-heftier-switche...
On 20/Jan/16 00:17, Phil Bedard wrote:
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router.
I don't think the FIB needs to have specific support for selective programming. I think that comes in the code to instruct the control plane what it should download to the FIB. Cisco's and Juniper's support of this is on FIB that has been in production long before the feature became available. It was just added to code. Mark.
That's right, logic is in programming chips, not their property. You just need to know what to program ;-) Regards, Jeff
On Jan 19, 2016, at 10:10 PM, Mark Tinka <mark.tinka@seacom.mu> wrote:
On 20/Jan/16 00:17, Phil Bedard wrote:
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router.
I don't think the FIB needs to have specific support for selective programming.
I think that comes in the code to instruct the control plane what it should download to the FIB.
Cisco's and Juniper's support of this is on FIB that has been in production long before the feature became available. It was just added to code.
Mark.
As a follow up to this post, it look like the Arista 7500R series has this new chip inside of it. On Wed, Jan 20, 2016 at 9:34 AM, Jeff Tantsura <jeff.tantsura@ericsson.com> wrote:
That's right, logic is in programming chips, not their property. You just need to know what to program ;-)
Regards, Jeff
On Jan 19, 2016, at 10:10 PM, Mark Tinka <mark.tinka@seacom.mu> wrote:
On 20/Jan/16 00:17, Phil Bedard wrote:
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router.
I don't think the FIB needs to have specific support for selective programming.
I think that comes in the code to instruct the control plane what it should download to the FIB.
Cisco's and Juniper's support of this is on FIB that has been in production long before the feature became available. It was just added to code.
Mark.
On 18/04/16 20:01, Colton Conor wrote:
As a follow up to this post, it look like the Arista 7500R series has this new chip inside of it.
On Wed, Jan 20, 2016 at 9:34 AM, Jeff Tantsura <jeff.tantsura@ericsson.com> wrote:
That's right, logic is in programming chips, not their property. You just need to know what to program ;-)
Regards, Jeff
Not only the big one, The new Arista 7280R is also the new BRCM DNX aka Jericho. Aswell as Cisco NCS550X series. -- hugge
Yes. We also have 1M+ FIB support day one too - hence the letter 'R' denoting the evolution with 3rd generation of its evolution to internet edge/router use cases. Not sure what other vendors are doing but I doubt others are yet shipping large table support. (there's more to it than just the underlying native silicon) cheers, lincoln. (ltd@arista.com) On Mon, Apr 18, 2016 at 11:01 AM, Colton Conor <colton.conor@gmail.com> wrote:
As a follow up to this post, it look like the Arista 7500R series has this new chip inside of it.
On Wed, Jan 20, 2016 at 9:34 AM, Jeff Tantsura <jeff.tantsura@ericsson.com
wrote:
That's right, logic is in programming chips, not their property. You just need to know what to program ;-)
Regards, Jeff
On Jan 19, 2016, at 10:10 PM, Mark Tinka <mark.tinka@seacom.mu> wrote:
On 20/Jan/16 00:17, Phil Bedard wrote:
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router.
I don't think the FIB needs to have specific support for selective programming.
I think that comes in the code to instruct the control plane what it should download to the FIB.
Cisco's and Juniper's support of this is on FIB that has been in production long before the feature became available. It was just added to code.
Mark.
So can this compete routing wise against something like a Juniper MX104 or Cisco ASR 9001? On Mon, Apr 18, 2016 at 1:42 PM, lincoln dale <ltd@interlink.com.au> wrote:
Yes. We also have 1M+ FIB support day one too - hence the letter 'R' denoting the evolution with 3rd generation of its evolution to internet edge/router use cases.
Not sure what other vendors are doing but I doubt others are yet shipping large table support. (there's more to it than just the underlying native silicon)
cheers,
lincoln. (ltd@arista.com)
On Mon, Apr 18, 2016 at 11:01 AM, Colton Conor <colton.conor@gmail.com> wrote:
As a follow up to this post, it look like the Arista 7500R series has this new chip inside of it.
On Wed, Jan 20, 2016 at 9:34 AM, Jeff Tantsura < jeff.tantsura@ericsson.com> wrote:
That's right, logic is in programming chips, not their property. You just need to know what to program ;-)
Regards, Jeff
On Jan 19, 2016, at 10:10 PM, Mark Tinka <mark.tinka@seacom.mu> wrote:
On 20/Jan/16 00:17, Phil Bedard wrote:
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router.
I don't think the FIB needs to have specific support for selective programming.
I think that comes in the code to instruct the control plane what it should download to the FIB.
Cisco's and Juniper's support of this is on FIB that has been in production long before the feature became available. It was just added to code.
Mark.
It depends… there’s a phenomenon called “next-hop flattening” which has to do with lookup recursiveness within the silicon. Unless this is done (and this is big piece of work) not everything supported on Trio or Ezchip can be supported. In general – Jericho (and its followers) is a great piece of silicon made by clueful folks… watch this space closely Jeff From: Colton Conor <colton.conor@gmail.com> Date: Monday, April 18, 2016 at 11:44 AM To: lincoln dale <ltd@interlink.com.au> Cc: Jeff Tantsura <jeff.tantsura@ericsson.com>, "nanog@nanog.org" <nanog@nanog.org> Subject: Re: New Switches with Broadcom StrataDNX So can this compete routing wise against something like a Juniper MX104 or Cisco ASR 9001? On Mon, Apr 18, 2016 at 1:42 PM, lincoln dale <ltd@interlink.com.au> wrote: Yes. We also have 1M+ FIB support day one too - hence the letter 'R' denoting the evolution with 3rd generation of its evolution to internet edge/router use cases. Not sure what other vendors are doing but I doubt others are yet shipping large table support. (there's more to it than just the underlying native silicon) cheers, lincoln. (ltd@arista.com) On Mon, Apr 18, 2016 at 11:01 AM, Colton Conor <colton.conor@gmail.com> wrote: As a follow up to this post, it look like the Arista 7500R series has this new chip inside of it. On Wed, Jan 20, 2016 at 9:34 AM, Jeff Tantsura <jeff.tantsura@ericsson.com> wrote:
That's right, logic is in programming chips, not their property. You just need to know what to program ;-)
Regards, Jeff
On Jan 19, 2016, at 10:10 PM, Mark Tinka <mark.tinka@seacom.mu> wrote:
On 20/Jan/16 00:17, Phil Bedard wrote:
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router.
I don't think the FIB needs to have specific support for selective programming.
I think that comes in the code to instruct the control plane what it should download to the FIB.
Cisco's and Juniper's support of this is on FIB that has been in production long before the feature became available. It was just added to code.
Mark.
On 18 April 2016 at 21:44, Colton Conor <colton.conor@gmail.com> wrote: Hey,
So can this compete routing wise against something like a Juniper MX104 or Cisco ASR 9001?
Super broad question. Generally they are not targeting same applications. MX104 (Trio) and ASR9001 (EZchip) are high-touch chips, where-as Jeiricho is low-touch chip. What it can do, it can do fast and economically. -- ++ytti
Lincoln, Why wouldn’t they? What is it Arista did others didn’t? Cheers, Jeff From: lincoln dale <ltd@interlink.com.au<mailto:ltd@interlink.com.au>> Date: Monday, April 18, 2016 at 11:42 AM To: Colton Conor <colton.conor@gmail.com<mailto:colton.conor@gmail.com>> Cc: Jeff Tantsura <jeff.tantsura@ericsson.com<mailto:jeff.tantsura@ericsson.com>>, "nanog@nanog.org<mailto:nanog@nanog.org>" <nanog@nanog.org<mailto:nanog@nanog.org>> Subject: Re: New Switches with Broadcom StrataDNX Yes. We also have 1M+ FIB support day one too - hence the letter 'R' denoting the evolution with 3rd generation of its evolution to internet edge/router use cases. Not sure what other vendors are doing but I doubt others are yet shipping large table support. (there's more to it than just the underlying native silicon) cheers, lincoln. (ltd@arista.com<mailto:ltd@arista.com>) On Mon, Apr 18, 2016 at 11:01 AM, Colton Conor <colton.conor@gmail.com<mailto:colton.conor@gmail.com>> wrote: As a follow up to this post, it look like the Arista 7500R series has this new chip inside of it. On Wed, Jan 20, 2016 at 9:34 AM, Jeff Tantsura <jeff.tantsura@ericsson.com<mailto:jeff.tantsura@ericsson.com>> wrote:
That's right, logic is in programming chips, not their property. You just need to know what to program ;-)
Regards, Jeff
On Jan 19, 2016, at 10:10 PM, Mark Tinka <mark.tinka@seacom.mu<mailto:mark.tinka@seacom.mu>> wrote:
On 20/Jan/16 00:17, Phil Bedard wrote:
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router.
I don't think the FIB needs to have specific support for selective programming.
I think that comes in the code to instruct the control plane what it should download to the FIB.
Cisco's and Juniper's support of this is on FIB that has been in production long before the feature became available. It was just added to code.
Mark.
participants (9)
-
Colton Conor -
Fredrik Korsbäck -
Jeff Tantsura -
Jeff Tantsura -
lincoln dale -
Mark Tinka -
Phil Bedard -
Saku Ytti -
Tarko Tikan