So can this compete routing wise against something like a Juniper MX104 or Cisco ASR 9001? On Mon, Apr 18, 2016 at 1:42 PM, lincoln dale <ltd@interlink.com.au> wrote:
Yes. We also have 1M+ FIB support day one too - hence the letter 'R' denoting the evolution with 3rd generation of its evolution to internet edge/router use cases.
Not sure what other vendors are doing but I doubt others are yet shipping large table support. (there's more to it than just the underlying native silicon)
cheers,
lincoln. (ltd@arista.com)
On Mon, Apr 18, 2016 at 11:01 AM, Colton Conor <colton.conor@gmail.com> wrote:
As a follow up to this post, it look like the Arista 7500R series has this new chip inside of it.
On Wed, Jan 20, 2016 at 9:34 AM, Jeff Tantsura < jeff.tantsura@ericsson.com> wrote:
That's right, logic is in programming chips, not their property. You just need to know what to program ;-)
Regards, Jeff
On Jan 19, 2016, at 10:10 PM, Mark Tinka <mark.tinka@seacom.mu> wrote:
On 20/Jan/16 00:17, Phil Bedard wrote:
Good point, there are many people looking at what I call FIB optimization right now. The key is having the programmability on the device to make it happen. Juniper/Cisco support it using policies to filter RIB->FIB and I believe both also do per-NPU/PFE localized FIBs now. I am not sure if that’s something supported on this new Broadcom chipset. Depends on your network of course and where you are looking to position the router.
I don't think the FIB needs to have specific support for selective programming.
I think that comes in the code to instruct the control plane what it should download to the FIB.
Cisco's and Juniper's support of this is on FIB that has been in production long before the feature became available. It was just added to code.
Mark.